Comparator Hybrid

The last major circuit block on the input board is the comparator hybrid. It consists of a diode bridge limiter with constant input resistance and a custom HP bipolar comparator IC, The comparator IC is a high-speed differential amplifier wilb hysteresis. The diode hridge limiter prevents I he signal from exceeding the common and difference voltage limits of the differential amplifier. This ensures that propagation delay changes as a function of input amplitude are minimized, which directly...

Acknowlegments

Many people contributed to the design of the HP 5371A measurement hardware. William Lam designed the ZDT sequencer board and was responsible for the ZDT ASIC development. Mark Wine and Victor Prince handled the DMA memory support and measurement control hardware. Jim Cole designed the time base synthesizer. Steve Carroll and Ron Jensen contributed to the interpolator hardware and the power supply design, respectively. The project team would also like to thank everyone al the Santa Clara...

Sequencer

The sequencer is one of two ASICs (application-specific integrated circuits) developed in-house for the HP 5371A. Fabricated using the HP5 process (a 5-GH . fT, bipolar process), this digital IC operates at frequencies in excess of 500 MHz. Containing over 2000 transistors and dissipating 3W. the sequencer occupies a 4,56 x4.74-mm die packaged in a 72-pin printed circuit pin-grid array, or PCPGA (see Fig. 5). Mounting the die on the PCPGA's gold-plated, copper heat slug and attaching a...

By Kenneth S Thompson

THK FLEXIBILITY AND ACCURACY afforded by the architecture of the digital waveform synthesis IC (DWSIC, see article page 57) make the HP 89 4A Multifunction Synthesizer suited for a broad range of applications. These applications areas include t l communications, navigation, mobile radio communications, consumer electronics, sonar, and electromechanical systems. Typically the conflicting requirements of these applications have been met by many specialized sources optimized for specific tasks or...

Channel Configuration Mode

In the channel configuration mode, the four independent synthesizers can be combined with digital precision to form complex signals. One such waveform is the stereo composite test signal used in the manufacture of FM stereo receivers. The FM stereo broadcast system uses a subcarrier system centered at 38 kHz to transmit stereo information along with the normal rnonophonic audio information occupying the frequency band from 20 Hz to 15 kHz. A pilot frequency of 19 kHz is used to indicate the...

By Robert Coackley and Howard L Steadman

THE RAPID ACCEPTANCE of distributed data processing, workstations, and personal computers lias made networking the critical unifying technology in modern computing environments. Most of today's networking technology is an extension of ideas developed in the late fills and early 70s. However, within the last 15 years there has been significant change both in users' requirements and in the technology available to implement networks. This architecture was designed to address these changes and to...

Data Link Layer Design

The data link layer of the network design is fundamental to the operation of the- network and specifies the frame structure and trunk link protocol. Here we describe the design with reference to a simple dedicated trunk link connecting two nodes. Link operation is full-duplex and symmetrical. so we only need to consider the operation of one half of the link. Each frame is made up of three major sections a header containing frame identification information, a body containing virtual circuit data...

Digital Waveform Synthesis Integrated Circuit

The HP 8904A uses digital synthesis techniques, that is, direcl mathematical calculation of the waveform point by point in real time. Digital hardware implements the mathematics. Fig. 6 shows the basic digital waveform synthesizer used in the DWSIC. At the heart of this synthesizer is a phase accumulator consisting of an N-bit binary adder and latch circuit. The output frequency of the phase accumulator is delermined bv the formula Where f is the binary frequency input number, N is the...

Reading a Counter on the

A traditional bnary r ppie counter consists of a series ot cascaded a-vde-Oy-two stages With trie frequency halved after each stage, the man nur. count rate is effect veiy deters red by the first tew stages Subsequent stages do not affect the maximum count rate so they can be slow and numerous Our ng coum ng. cames r ppie through a varying number of stages with afferent propagator deiays In a high-speed counter die switching times of some of the Slower stages may span many nput cycles For these...

By Thomas M Higgins Jr

THK WAVEFORMS GENERATED in the digital waveform synthesis IC DWSIC in the IIP 8904A Multifunction Synthesizer exist only as 12-bit binary numbers at the output of the IC. The output system converts these binary numbers into the desired analog signals. The first step in this conversion process is the digital-to-analog converter IJAC , Each binary number output by the DWSIC represents the instantaneous voltage of the waveform being generated. Each number represents a sample of the waveform, and...

Hop RAM Mode

One benefit of ihe phase accumulator synthesis technique used in the digital waveform synthesis 1C is very-fast switching of frequency, phase, or amplitude. In effect the HP 8904A can change states in a single cycle of the DWSIC. To make this capability useful, the hop RAM mode was developed. The hop RAM mode provides sixteen memory locations which can each contain an amplitude, frequency, and phase setting. A special hop bus on the rear panel of the HP 8904A controls which of the sixleeo hop...

Signal Sequencing Modes

The three sequence modes in the HP 8904A can be used to generate a wide range of signaling formats. These signaling formats are used in mobile communications to call pocket pagers, mobile radios, or cellular telephones. They can also he used to transmit data to mobile receivers, for example to send telephone numbers or messages to pocket pagers equipped with alphanumeric displays. The Motorola 5 6 tone signaling format is an example of a signaling scheme for the selective calling of pocket...

ZDTlzZDTlz

ZDT3n Ii - ZDT3uJ 2ns I - iop - Istart 200 ps l where ZDTim denotes the event count recorded by ZDT counting chain i for sample m, using latch n. Start and stop interpolator counts are denoted by Ia arl and IBt0p, respectively. Note that n 1 latch operations are performed for a block of n measurements. If the sampling rate is controlled by a ZDT chaio, as in the time sampling or event sampling arming modes, the measurement is not continuous. In this case, both latches of ZDTl and ZDT3 are...

Phase Progression Plot

In Fig, 2a, the samples obtained from phase digitizing a HPSK signal are shown with their tj and e, values. In Fig. 2b they are plotted using t and as the X and Y coordinates. The two different frequencies are manifested in the apparently piecewise linear figure. The slope drf gt t dt of the line shown in the figure is the derivative of the phase function and therefore indicates the frequency of ihe signal. Notice that the sudden change in signal frequency is effortlessly handled by the phase...

Generating a Phase Locked Binary Reference Frequency

Controlled Frequency Divider

The HP 8904A s precise control of phase s more useful if It can be phase-locked to other instruments. To accomplish this, an accumulator-based reference loop is included in the design This loop performs the fractional division necessary to lock the master clock to an inierna' or external 10-MHz reference. Since the phase accumulator is 24 bits wide and the desired frequency resolution for each channel is 0.1 Hz. the clock for each channei must be 2 0.1 Hz , or 1 6772160 MHz. There are...

Tone sequence information for the HP A to Generate Motorola Tone Sequential Signaling

Tone Signaling Motorola

HP 8904A Multifunction Synthesizer Data Fig. 5. 5 6 tone signaling as generated by the by the HP 8904A. This pattern represents the message 2751A on times have been reduced to 3 ms per tone to facilitate the plot . Fig. 5. 5 6 tone signaling as generated by the by the HP 8904A. This pattern represents the message 2751A on times have been reduced to 3 ms per tone to facilitate the plot . used for fast frequency switching applications and simulating modem signals. The HP 8904A can also be used as...

Hardware Design

An HP 5371A signal flow block diagram is presented in Fig. 8, Many of the sections are covered in detail in the accompanying articles. Input Section. Two measurement channel inputs A.B and one external arming channel input are supplied. These Fig. 6. The time holdoff arming mode can be used to delay blocks of measurements by a specified time. Fig. 7. The start and end of a single measurement can both be defined by time or event holdoffs. input channels convert arbitrary-level input signals into...

Channel Configuration Settings for a Composite VOR Navigation Waveform with a Bearing Angle of Degrees

Changing the phase of channel R will alter the bearing angle. Frequency Amplitude I'hase Waveform In a similar manner to the FM stereo example, the VOR composite signal generated by the HP 8904A can be used to modulate an RF signal generator to test a VOR receiver. In this case, the composite signal is used to amplitude modulate the RF signal generator. By programming the HP 8904A to generate VOR composite signals with different bearing angles, the accuracv of the VOR receiver under test can...

Stat nin nsecKax nsec

Histogram of compact-disc pulse width measurements with eight-o -fourteen modulation Fig. 10. Histogram of compact-disc pulse width measurements with eight-o -fourteen modulation transfers. A histogram effectively provides the user with a probability density function for the random process. Mean value is important, hut perhaps more important is the evaluation of the standard deviation and minimum and maximum values, and how these relate to liming margin i.e quality . An important...

HP A Instrument Design

The DWSIC made the design of the HP 8904A instrument very straightforward. Fig. 7 is a block diagram of the instrument showing the organization of control, digital signal generation, output channel signal conditioning, and external connections. The DWSIC takes care of digital generation of all the signals. The DWSlC's output is a 12-bit digital word. This word is docked onto a bus connected to the channel's output section and signal conditioning circuits. The DWSIC does one other job it...

By Terrance K Nimori and Lisa B Stambaugh

FREQUENCY COUNTERS offer the high resolution and measurement flexibility essential for examining frequency or timing stability. Traditional counters, however, lack measurement control and analysis capabilities for profiling changes in frequency or timing parameters. Although external processing is often used to reveal modulation or jitter components, software complexity and non-continuous sampling limit the effectiveness of this technique. Based on continuous measurement technology, the HP...

By Fred H Ives

Modern communications systems employ complex modulation formats, sometimes using subcarriers or time varying signals to increase their capacity and usability. The divergent testing requirements imposed by these systems have been typically solved with one-of-a-kind custom solutions. This is a costly and sometimes unreliable solution. The HP 89U4A Multifunction Synthesizer Fig. 1 was developed to provide a low-cost, high-performance alternative to these application-specific complex waveform...

B nsec to nsecMean

V hii 43.502910 MHz to 90.192145 MH mrkr 599.959 U.Sgc, 6.075661 MHz Fig. 9. Histograms can be displayed on the CRT Marker and zoom features are available Fig, 11. The step response ol a VCO is shown by a time variation plot Delta basecl on it lt neasurstneriti-. - Time Int h - E 18 Oct 1987 Fig. 12. An event timing graph for two pulse bursts shows that 16 events occurredon the A channel between the markers and the marked events occurred 1 1549958 ms apart ing behavior. This display is simply a...

Acknowledgments

The development of the architecture described in this article has been very much a team effort. All the members of the development team have made significant contributions that led to a successful implementation of a network using these principles. Specifically, the authors would like to thank David Means, Bruce Hamilton. Phil Curtis, and Alan Maloney for their contributions lo the development of the architecture. Additionally, we wish to acknowledge the contributions made by Wayne...

Frequency Coverage Extension

The counting range for the HP 5371A is 0 to 500 MHz, Fig. 8. P lase progression plot for a BPSK signal. and this represents Ihe dynamic frequency range an agile carrier can operate over and still be measurable. With a frequency down-converter, this frequency agility range can be moved to microwave regions, Heterodyning preserves phase and translates frequency, so frequency-coded and phase-coded signals can be demodulated after down-eon-version. The signal illustrated in Fig. 4 was...

Continuous Measurement Capability

To illustrate the advantages of the continuous measurement technique, we can compare a traditional reciprocal counter with a continuous counter using a simple input signal, a steady-state sine wave see Tig, 2 , A reciprocal counter e.g., the HP 5335A or HP 5345A opens the measurement gate start sample , records event and time counts, and then closes the measurement gate after a predefined gale time slop sample , again recording event and time counts Fig. 2a . The measurement is complete at this...

Frequency Agile Measurements

The principal problem in frequency agile measurements is acquiring a lime history of the source frequency. It is more efficient to count the number of signal periods during each sampling period while sampling al a rate tailored to the modulation bandwidth of the source under test than to record the entire waveform and post process it. The HP 5371A uses the former method to make frequency agile measurements, and thereby reduces the amount of data and processing required. Other attempts to...