74ls374 Circuit Diagrams

vides by a total of either 10,000 or 100,000, as selected by the software. The resulting output of U2 (pin 26) is a 1-Hz or 10-Hz signal.

The counter is divided between the front-end section and a Philips HEF4534 CMOS counter, U4. U4 provides 5 decades of BCD counting, with the four bits of each decade appearing successively on the outputs of the IC. U8 provides the sixth decade, with the seventh, least-significant decade provided by either U21 or U22, in the "front end" circuit of Fig 1. One of the control-register bits (pin 6 of U12) provides a master counter-clear signal to each of the counter devices. This signal, along with the gate signal from U6, controls counter operation.

The front-end circuitry contains two counter chips, each if which is connected to its own input circuitry. U20, controlled by a bit of the control register, selects between the two counter chips. One of these chips, U21, counts the DIRECT input, which is conditioned by U18A, a high-speed comparator. The PRESCALER input is applied to U19, a 1-GHz, - 64 prescaler IC. Its output is converted to TTL levels by U18B and applied to U22 for counting. Since the frequency counting chain

Fig 2—Schematic of the PC-based counter board. Use 0.1-nF bypass capacitors (riot shown) from Vcc to ground at all IC sockets.

U2—Philips HEF4750 frequency synthesizer IC. U3—74LS390 decade counter IC. U4—Philips HEF4534 5-decade frequency counter IC. U5—10-MHz oscillator (see text). U6—74LS74 dual D flip-flop IC. U7—74LS04 hex inverter IC. U8—74LS160 decade counter IC. U9,11—74LS244 octal buffer IC. U10—74LS32 quad OR gate IC. U12—74LS374 octal D latch IC. U13—74LS30 8-input NAND gate IC. U14—74LS02 quad NOR gate IC. U15—74LS139 dual 4-line decoder IC. U16—74LS245 octal bus buffer IC.

74ls245 74ls374 74ls04 Schematic

cn n

Table 1—Frequency Counter Registers

Table 2—Control Register Bits

Table 1—Frequency Counter Registers

Address (hex)

R/W

Register

0 -1

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