A PSK Demodulator for the JAS Satellite

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By Fujio Yamashita, JS1UKR, JARL, Sugamo 1-14-2

Toshima-Ku, Tokyo, 170 JAPAN___

introduction

The digital transponder on the JAS-1 satellite is designed to transmit its downlink signal by PSK modulation. Therefore, reception of the downlink signal requires a PSK demodulator. Several circuits are available, but this article introduces another recently developed.

A PSK signal can be thought of as carrier-suppressed double sideband (DSB). To demodulate the signal, a carrier signal identical in frequency and phase as the received PSK signal is required. The key to demodulation is knowing how to regenerate a carrier coherent to the received PSK signal. An SSB receiver is only used as the linear frequency converter and does not work for PSK demodulation.

The carrier frequency of a down-converted PSK signal is chosen to be around 1600 Hz so the spectrum of the signal falls within ±600 Hz. There are several reasons why a frequency of 1600 Hz is chosen. Here, the signal can pass through the flat part of the passband

PSK SIGNAL O-INPUT

i

s

multiplier

q

multiplier

o output

Fig 1—Basic diagram of a Costas loop.

of a conventional amateur SSB receiver, capable of receiving voice communications up to 3 kHz. Because the rate of in formation is 1200 bits/s, it is better for the carrier frequency to differ by 1200 Hz, considering carrier suppression.

Psk Block Diagram
Fig 2—Block diagram of the demodulator circuit.

| CHECK POINT t 0.8 V OF EYE I PATTERN

| CHECK POINT t 0.8 V OF EYE I PATTERN

Cd4046 Fsk

Fig 3—Schematic diagram of the PSK demodulator.

4 QEX

SHORT FOR vco Wt

SHORT FOR vco Wt

Irig Circuit

OL: LOCK

OL: LOCK

Circuit Description

The circuit presented is an adaptation of the Costas loop. Its merits include:

• A lock indicator

• A sense indicator of the received frequency shift

• Output of the sense indicator drives the receiver VCO (if an input port is available) to automatically track the received signal

Fig 1 shows a block diagram of the Costas loop. The multipliers labeled I-, Q-and third form a phase lock loop (PLL) circuit. A carrier signal is applied to the I-and Q-multiplier with a phase difference of 90° to each other. The two outputs connect through the low-pass filters and are introduced to the third multiplier. Its output is then applied to tne variable crystal oscillator (VCO) through the loop filter. The data signal to the terminal node controller (TNC) is obtained from the l-multiplier.

It is necessary to receive some indication that the PLL is in a lock condition. While the Costas loop's output does not contain signal amplitude information, the main loop circuit should be designed to include a PLL indicator. The modified circuit operates with applied carrier signals showing a phase difference of ±45°.

The Circuit

Fig 2 shows a block diagram of the demodulator circuit and Fig 3 is the schematic diagram. The multipliers consist of an LM324 op amp (U1) and a 4066 analog switch (U8). The 4046 VCO generates a frequency eight times that of the carrier. This signal frequency is divided by eight and applied to the shift register (U11) to obtain the phase differences of 45° each.

Once the circuit wiring is complete, place a jumper (W1) between points A and B; this makes U9 a voltage follower. Adjust the VCO frequency to read 12.8 kHz, keeping its input reference voltage at 6 volts.

VCO Indicator

If your receiver has the means of driving the VCO from an external source, the following process will go easily.

When the received frequency get higher than the 1600-Hz carrier, the sic nal indicator (down) shows its status an delivers a corresponding output signe voltage. This allows control of the Rl receiving frequency and up signal. Bot of the signals (up and down) appear o the indicator panel when the frequenc deviates over ±100 Hz, When the recei\ irig frequency is correct, the lock LEI shows this.

up and down indicate the deviatio sense only of the input signal frequenc of the demodulator and not of the receive frequency, up and down will invert a< cording to the sideband being used.

The meter (M1) at U9 is a lock indies tor and is important for frequency tuninc Scale this within +5 volts.

A level indicator aids in setting a prop« receiver audio level. Because the Dopplf shift of JAS-1 is larger than the lock rang of the circuit, this indicator might b necessary. Any indicator such as an LEI will suffice.

It is better for the up, down and lgc signals to be arranged for an RS-232-i format. The 12-V power supply should b

The Flight ot JAS-1 By Shozo Hara, JA1AN c/o JARL

Project JAS-1 has been in the works since 1983. Flight Models FM-1 and FM-2 were completed in March and November of 1985, respectively, for the August 1 flight. Both models were prepared for launch in the chambers of the NEC Corp near Tokyo.

On June 21, a vehicle with air-suspended wheels transported FM-2 to Tanegashima. Various test and measuring equipment accompanied the satellite on its journey.

The island of Tanegashima is located in southern Japan and is historically famous to the Japanese as the place the matchlock was introduced by drifted Portuguese people more than 400 years ago. In 1986, it was the launch site of JAS-1.

The Japanese National Space Agency launch vehicle, the NASDA H-1, consisted of a two-stage rocket. The propellant of the second stage rocket, that which carried JAS-1 into orbit, was liquid oxygen and hydrogen. The booster is capable of launching 3,968 pounds to an altitude of 932 miles with an inclination of 50°.

Instead of sending a dummy payload on the first H-1 test flight, three missions were onboard: EGP, the experimental geodetic payload, JAS-1 and the magnetic bearing flywheel experiment. About one hour after launch, the second stage rocket flew over South America, where two payloads separated from the rocket sequentially.

The satellite's power supply was activated at the moment of separation trom the rocket. The University of Chile agreed to provide assistance and was the first to receive the satellite's signals. About 20 minutes later, JAS-1 flew northward over England. There, the staff at the University of Surrey waited to check the health of the newborn satellite.

JAS-1 transmits its telemetry in CW using the analog transponder, Mode JA. During the initial period, the solar condition of the satellite will be examined. It is requested that listeners do nothing more than this until the operating schedule is announced.

Major Specifications of the Satellite

Orbit: Circular, 1500 km altitude Period: 116 minutes Inclination: 50° Life expectancy: 3 years Weight: 110.23 lbs

Configuration: Polyhedron of 26 faces covered by solar cells Size: 15.75 inches (diam) x 18.50 inches (height)

Power generation; 8 W initially

Transponders

Analog (JA—linear)

Input: 145.9 to 146.0 MHz (100-kHz bandwidth) Output: 435.9 to 435.8 MHz (inverted sideband) Required uplink EIRP: 100 W Transponder EIRP. 2-W P-P

Digital (JD)

Input: Four channels—145.85, 145.87,

145.89, 145.91 MHz Output: 435.91 MHz (one channel) Required uplink EIRP: 100 W Transponder EIRP: 1-W RMS Signal format: 1200-baud PSK, store and forward

Beacon and Telemetry

JA beacon: 435.795 MHz, 100 mW CW or PSK

JD telemetry: 435.910 MHz, 1 W PSK Orbit Parameters

Epoch: 1986-07-31, 21 h 32m 07.20s UT Semimajor axis: 7879.562 km Eccentricity: 0.000140656 Inclination: 50,0039' RA of ascending node: 237.456' Argument of perigee: 2.155' Mean Anomaly: 330.246'

6 QEX

well regulated. Current drain is less than 30 mA.

This circuit is small enough (no larger than a standard postcard) to fit inside a TNC. If this is where the circuit will reside, add a switch to the modem to select PSK or FSK.

Automatic Tracking

Perfect auto-tracking of the received signal will be impossible in a band full of interference and noise. First, capture the PSK signal manually. The auto-tracking system can take over once the Doppler shift is noticeable. When the circuit unlocks, try to manually access the satellite one more time. This is a good exercise to determine sensing—whether the frequency shift during lock is going to be up or down. Remember, the circuit has no searching function.

Testing the Circuit

If you own a TNC, construct a PSK signal generator that works with your equipment. A PSK-modulated signal can be generated by the circuit shown in Fig 4. Here, the audio frequency PSK signal is obtained by applying a 1600-Hz carrier signal to the Manchester encoder of the circuit. The PSK signal is used to examine the demodulator at audio frequencies, and the signal can also be

SHORT CIRCUIT FOR AF TESTING, OPEN FOR USE

SHORT CIRCUIT FOR AF TESTING, OPEN FOR USE

Audio Psk Demodulator

TO MIC TERMINAL -O OF SSB TRANSCEIVER, OR INPUT OF AF DEMODULATOR

Fig 4—Audio frequency PSK modulation circuit for testing the PSK demodulator.

applied to the mic terminal of a transceiver to check the PSK demodulator at RF.

Mode selection is easy if you are familiar with your TNC. Work with your system further by using test tapes.

Further development of the PSK demodulator circuit is expected. For additional information contact JAS-1 Committee, c/o Technical Institute, JARL, Sugamo 1-14-2, Toshima-ku, Tokyo, 170 Japan.

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  • james cope
    How psk demodulation work?
    8 years ago

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