to isolate the switch from the drain circuit.
Dual-gate MOSFETs Q4, Q5, and Q6 are 40673s. MFE211 s or 3N211 s could also be used, and may be more readily available. Each MOSFET has one precise current applied to its source, and one RF carrier signal applied between gate one and source. The source is bypassed to ground for the RF carrier, but not for the low-frequency precise current.
The RF clock generator, Fig 10, divides the VFO frequency by three to generate A^, B^, and C^. Only one of these three is high (+ 5 volts) at a time, with the other two low (0 volts). Thus, only one MOSFET switch is on at a time. Each MOSFET is on one third of the time. When on, the drain current is three times the precise current applied to the source. When off, the drain current is zero. There is also a current spike when the MOSFET turns on.
The combined drain currents can be observed by replacing the drain load circuitry shown in Fig 9, with a 383-ohm resistor to +12 volts. Observation of the drain voltage with a high-speed oscilloscope will then show the drain current waveform. At fast sweep speeds, the steps as each MOSFET turns on are visible, as are the current spikes. At slow sweep speeds, the waveform looks like the superposition of the three signals Aa, Ba, and Ca.
The drain load circuitry in Fig 9 is tuned to pass the carrier frequency component of the drain current to op amp U16, and to block low-frequency and harmonic components. U16 is the final amplifier of the exciter. U16 is operating with a loop gain of only 2 or so, so it isn't really being used as an op amp.
There are many new op amps capable of as good or better performance than the AD842 used for U16. Complementary-bipolar processes, which permit the building of ICs with fast PNP and NPN transistors on one chip, make these op amps feasible, and television and computer graphics provide large markets which make these op amps cheap.
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